PSL/Словарь терминов

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PSL

• The Designer's Guide To PSL (ru)

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Литература

• Литература
• IEEE Std 1850-2010
• Embedded PSL in VHDL (en)

Введение в PSL

• 1. Introduction (en)
• 2. Basic Temporal Properties (en)
• 3. Some Philosophy (en)
• 4. Weak vs. Strong Temporal Operators (en)
• 5. SERE Style (en)

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• Словарь терминов
• Дневник
• История проекта

* VHDL * OS-VVM * Co-Simulation *

foster_h__creating_assertion_based_ip__2008.pdf

• Приведены определения разных терминов
• Абривиатуры (стр.35)
  • AHB AMBA Advanced High-performance Bus
  • AMBA™ Advanced microcontroller bus architecture
  • APB AMBA Advanced Peripheral Bus
  • AVM Advanced Verification Methodology
  • BFM Bus functional model
  • DUV Design under verification
  • EDA Electronic design automation
  • eRM e reuse methodology
  • FIFO First in first out
  • FSM Finite state machine
  • HDL Hardware description language
  • HVL High-level verification language
  • I²C Inter-Integrated Circuit
  • IP Intellectual property
  • OVL Open Verification Library
  • OVM Open Verification Methodology
  • PSL Property Specification Language
  • RTL register transfer-level
  • SDRAM Synchronous dynamic random access memory
  • SoC System on chip
  • SVA SystemVerilog Assertions
  • TLM Transaction-level model
  • VIP Verification IP
  • VMM Verification Methodology Manual

Практическое введение в PSL:

• Foundation Language (FL)
• Optional Branching Extension (OBE)

3.4 Guidelines and conventions (стр.57)

Table 3-1 SVA naming convention guidelines for verification IP

Convention	Use
p_name	p_ is a prefix for property declaration names
s_name	s_ is a prefix for sequence declaration names
a_label	a_ is a prefix for assert directive labels
m_label	m_ is a prefix for assume directive labels (for formal)
c_label	c_ is a prefix for cover directive labels

Новые слова

• Слово на анг. — значение на русском